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80 lines
2.9 KiB
80 lines
2.9 KiB
package arm |
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import ( |
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"github.com/segmentio/asm/cpu/cpuid" |
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. "golang.org/x/sys/cpu" |
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) |
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type CPU cpuid.CPU |
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func (cpu CPU) Has(feature Feature) bool { |
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return cpuid.CPU(cpu).Has(cpuid.Feature(feature)) |
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} |
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func (cpu *CPU) set(feature Feature, enable bool) { |
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(*cpuid.CPU)(cpu).Set(cpuid.Feature(feature), enable) |
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} |
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type Feature cpuid.Feature |
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const ( |
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SWP Feature = 1 << iota // SWP instruction support |
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HALF // Half-word load and store support |
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THUMB // ARM Thumb instruction set |
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BIT26 // Address space limited to 26-bits |
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FASTMUL // 32-bit operand, 64-bit result multiplication support |
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FPA // Floating point arithmetic support |
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VFP // Vector floating point support |
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EDSP // DSP Extensions support |
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JAVA // Java instruction set |
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IWMMXT // Intel Wireless MMX technology support |
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CRUNCH // MaverickCrunch context switching and handling |
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THUMBEE // Thumb EE instruction set |
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NEON // NEON instruction set |
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VFPv3 // Vector floating point version 3 support |
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VFPv3D16 // Vector floating point version 3 D8-D15 |
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TLS // Thread local storage support |
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VFPv4 // Vector floating point version 4 support |
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IDIVA // Integer divide instruction support in ARM mode |
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IDIVT // Integer divide instruction support in Thumb mode |
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VFPD32 // Vector floating point version 3 D15-D31 |
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LPAE // Large Physical Address Extensions |
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EVTSTRM // Event stream support |
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AES // AES hardware implementation |
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PMULL // Polynomial multiplication instruction set |
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SHA1 // SHA1 hardware implementation |
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SHA2 // SHA2 hardware implementation |
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CRC32 // CRC32 hardware implementation |
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) |
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func ABI() CPU { |
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cpu := CPU(0) |
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cpu.set(SWP, ARM.HasSWP) |
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cpu.set(HALF, ARM.HasHALF) |
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cpu.set(THUMB, ARM.HasTHUMB) |
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cpu.set(BIT26, ARM.Has26BIT) |
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cpu.set(FASTMUL, ARM.HasFASTMUL) |
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cpu.set(FPA, ARM.HasFPA) |
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cpu.set(VFP, ARM.HasVFP) |
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cpu.set(EDSP, ARM.HasEDSP) |
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cpu.set(JAVA, ARM.HasJAVA) |
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cpu.set(IWMMXT, ARM.HasIWMMXT) |
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cpu.set(CRUNCH, ARM.HasCRUNCH) |
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cpu.set(THUMBEE, ARM.HasTHUMBEE) |
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cpu.set(NEON, ARM.HasNEON) |
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cpu.set(VFPv3, ARM.HasVFPv3) |
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cpu.set(VFPv3D16, ARM.HasVFPv3D16) |
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cpu.set(TLS, ARM.HasTLS) |
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cpu.set(VFPv4, ARM.HasVFPv4) |
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cpu.set(IDIVA, ARM.HasIDIVA) |
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cpu.set(IDIVT, ARM.HasIDIVT) |
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cpu.set(VFPD32, ARM.HasVFPD32) |
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cpu.set(LPAE, ARM.HasLPAE) |
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cpu.set(EVTSTRM, ARM.HasEVTSTRM) |
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cpu.set(AES, ARM.HasAES) |
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cpu.set(PMULL, ARM.HasPMULL) |
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cpu.set(SHA1, ARM.HasSHA1) |
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cpu.set(SHA2, ARM.HasSHA2) |
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cpu.set(CRC32, ARM.HasCRC32) |
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return cpu |
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}
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